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RT9245
Multi-Phase PWM Controller for CPU Core Power Supply
General Description
RT9245 is a multi-phase buck DC/DC controller integrated with all control functions for Intel(R) GHz CPU which is VRD10.X-compliant. The RT9245 could be operated with 2, 3 or 4 buck switching stages operating in interleaved phase set automatically. The multiphase architecture provides high output current while maintaining low power dissipation on power devices and low stress on input and output capacitors. The high equivalent operating frequency also reduces the component dimension and the output voltage ripple in load transient. RT9245 implements both voltage and current loops to achieve good regulation, response and power stage thermal balance. RT9245 applies the DCR sensing technology newly. The RT9245 extracts the ESR of output inductor as sense component to deliver a precise load line regulation and good thermal balance for next generation processor application. Current sense setting, droop tuning, VCORE initial offset and over current protection are independent on compensation circuit of voltage loop. The feature greatly facilitates the flexibility of CPU power supply design and tuning. The DAC output of RT9245 supports VRD10.x with 6-bit VID input, precise offset value & smooth VCORE transient at VID jump. The IC monitors the VCORE voltage for PGOOD and over-voltage protection. Soft-start, overcurrent protection and programmable under-voltage lockout are also provided to assure the safety of microprocessor and power system. The RT9245 comes to a small footprint package TSSOP-28.
Features
Multi-Phase Power Conversion with Automatic Phase Selection 6-bits VRD10.x DAC Output with Active Droop Compensation for Fast Load Transient Smooth VCORE Transition at VID Jump Power Stage Thermal Balance by DCR Current Sense Hiccup Mode Over-Current Protection Programmable Switching Frequency (50kHz to 400kHz per Phase), Under-Voltage Lockout and SoftStart High Ripple Frequency Times Channel Number 28-TSSOP Package RoHS Compliant and 100% Lead (Pb)-Free
Applications
Intel(R) Processors Voltage Regulator : VRD10.x Low Output Voltage, High Current DC-DC Converters Voltage Regulator Modules
Pin Configurations
(TOP VIEW)
VID4 VID3 VID2 VID1 VID0 VID125 SGND FB COMP PGOOD DVD SS RT VOSS 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC PWM1 PWM2 PWM3 PWM4 CSP4 CSP2 CSP3 CSP1 GND ADJ NC CSN IMAX
Ordering Information
RT9245 Package Type C : TSSOP-28 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard)
TSSOP-28 Note : RichTek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100% matte tin (Sn) plating.
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VIN
ATX 12V
+
1uH C11 1000uF C12 1uF C14 1000uF
+ +
ATX 12V
C10 0.1uF C13 R22 10 D1 1N4148 1 BST VCC SW 5 IN NC PGND 6 IPD06N03LA C16 3.3nF DRVL R24 0 Q2 R25 2.2 7 IPD09N03LA L1 1uH 4 RT9603 8 DRVH R23 0 Q1 1uF C15 1000uF
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VCC 5V
2 3 R9 10 C9 0.1uF
RT9245
RT9245 VID4 VID3 VID2 VID1 VID0 VID125 SGND FB COMP CSP1 GND PGOOD ADJ NC CSN 16 IMAX
R21 6.8k 15 NC R20 330 C23 0.1uF 2 3 IN NC 17 18 R19 82 1 4 C8 0.1uF R30 10 D3 1N4148 19 R18 0 R17 10k 20 C7 0.1uF
C4 0.1uF
+
ATX 12V
C18 0.1uF C19 R27 0 IPD09N03LA Q4 Q3 1uF
VIN
C21 C20 1000uF 1000uF
+
Typical Application Circuit
VID4
1
VCC PWM1 PWM2 PWM3
SW 5 DRVL PGND 6 R28 0 25 R13 0 R14 C5 0.1uF R15 10k R16 10k C6 0.1uF 10k 2 IN 3 NC C17 0.1uF R12 7 0 4 VCC 26 R11 0 1 RT9603 8 BST DRVH 27 R10 0 R26 10 D2 1N4148
28
VID3
2
VOUT
L2 1uH C35 to C46 1000uF x 12 + R29 2.2
VID2
3
VID1
4
VID0
5
PWM4 24 CSP4 CSP2 CSP3 ATX 12V
C24 0.1uF 21 22 23
6
+
IPD06N03LA C22 3.3nF C47 to C50 10uF x 4
VID125 R1 0
7
N.C
8
C1
33pF
9
VIN
R2 3k
C27 C26 1000uF 1000uF
+ +
R3 15k
C2 10nF
C25 R31 0 BST VCC RT9603 8 DRVH SW 7 Q5 IPD09N03LA Q6 5 DRVL PGND 6 IPD06N03LA R32 0 R33 2.2 C28 3.3nF 1uF
VCC 5V
10
ATX 12V
R5 9.1k
R4 10k
11
DVD SS RT VOSS
C3 0.1uF
12
L3 1uH
R6 2k
13
R7 30k 14
R8 100k
ATX 12V
C30 0.1uF
VIN
C33 C32 1000uF 1000uF
+ +
C31 R34 10 D4 1N4148 R35 0 1 4 C29 0.1uF 2 3 IN NC BST VCC RT9603 8 DRVH SW 7 Q7 IPD09N03LA Q8 5 DRVL PGND 6 R36 0 R37 2.2 IPD06N03LA C34 3.3nF 1uF L4 1uH
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RT9245
Functional Pin Description
VID4 (Pin 1), VID3 (Pin 2), VID2 (Pin 3), VID1 (Pin 4), VID0 (Pin 5) & VID125 (Pin 6) DAC voltage identification inputs for VRD10.x. These pins are internally pulled to 1.2V if left open. SGND (Pin 7) VCORE differential sense negative input. FB (Pin 8) Inverting input of the internal error amplifier. COMP (Pin 9) Output of the error amplifier and input of the PWM comparator. PGOOD (Pin 10) Power good open-drain output. DVD (Pin 11) Programmable power UVLO detection input. Trip threshold = 1.2V at VDVD rising. SS (Pin 12) Connect this SS pin to GND with a capacitor to set the soft-start time interval. Pulling this pin below 1V (ramp valley of sawtooth wave in pulse width modulator) would make all PWMs low, turn on low side MOSFETs, and turn off high side MOSFETs. RT (Pin 13) Switching frequency setting. Connect this pin to GND with a resistor to set the frequency. VOSS (Pin 14) VCORE initial value offset. Connect this pin to GND with a resistor to set the negative offset value. Connect this pin to VCC to set positive offset value. CSP1 (Pin 20), CSP2 (Pin 22), CSP3 (Pin 21) & CSP4 (Pin 23) Current sense positive inputs for individual converter channel current sense. PWM1 (Pin 27), PWM2 (Pin 26), PWM3 (Pin 25) & PWM4 (Pin 24) PWM outputs for each driven channel. Connect these pins to the PWM input of the MOSFET driver. For systems which use 3 channels, connect PWM4 high. Two channel systems connect PWM3 high. VCC (Pin 28) IC power supply. Connect this pin to a 5V supply. ADJ (Pin 18) Current sense output for active droop adjust. Connect a resistor from this pin to GND to set the load droop. GND (Pin 19) Ground for the IC. NC (Pin 17) No Connection. IMAX (Pin 15) Programmable over currert setting. CSN (Pin 16) Current sense negative input of all channels.
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OCP Setting Power On Reset ++ PWMCP
INH
Function Block Diagram
DAC
++ PWMCP
INH
Oscillator & Sawtooth +
INH
VID4 VID3 VID2 VID1 VID0 VID125 -
OVP Trip Point ++ + +
PG Trip Point + ++
Current Correction MUX +
GAP Amplifier
SS Control -
SUM/M
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FB COMP SS
VOSS
ADJ
GND
-
+
-
-
+
Offset Currrent Source/Sink +
-
Error Amplifier
MUX
-
+
DAC + Droop
+
+
+
-
-
+
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IMAX PGOOD VCC DVD RT
INH
RT9245
PWM Logic & Driver
PWM1
PWM Logic & Driver
PWM2
PWM Logic & Driver PWMCP
INH
PWM3
PWM Logic & Driver PWMCP Phase Control
PWM4
CSP1 CSP2 CSP3 CSP4 CSN
RT9245
Table 1. Output Voltage Program
Pin Name VID4 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 VID3 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 VID2 1 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 VID1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 0 0 0 0 1 1 1 1 VID0 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 0 0 1 1 0 0 VID125 X 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 No CPU 0.8375V 0.850V 0.8625V 0.875V 0.8875V 0.900V 0.9125V 0.925V 0.9375V 0.950V 0.9625V 0.975V 0.9875V 1.000V 1.0125V 1.025V 1.0375V 1.050V 1.0625V 1.075V 1.0875V 1.100V 1.1125V 1.125V 1.1375V 1.150V 1.1625V 1.175V 1.1875V 1.200V 1.2125V Nominal Output Voltage DACOUT
To be continued
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RT9245
Table 1. Output Voltage Program
Pin Name VID4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 VID3 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 VID2 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 VID1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 VID0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 VID125 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1.225V 1.2375V 1.250V 1.2625V 1.275V 1.2875V 1.300V 1.3125V 1.325V 1.3375V 1.350V 1.3625V 1.375V 1.3875V 1.400V 1.4125V 1.425V 1.4375V 1.450V 1.4625V 1.475V 1.4875V 1.500V 1.5125V 1.525V 1.5375V 1.550V 1.5625V 1.575V 1.5875V 1.600V Nominal Output Voltage DACOUT
Note: (1) 0 : Connected to GND (2) 1 : Open (3) X : Don't Care www.richtek.com 6 DS9245-06 March 2007
RT9245
Absolute Maximum Ratings
(Note 1) 7V GND - 0.3V to VCC + 0.3V 100C/W 150C 260C -65C to 150C 2kV 200V Supply Voltage, VCC ------------------------------------------------------------------------------------------Input, Output or I/O Voltage ---------------------------------------------------------------------------------Package Thermal Resistance TSSOP-28, JA -------------------------------------------------------------------------------------------------Junction Temperature -----------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------Storage Temperature Range --------------------------------------------------------------------------------ESD Susceptibility (Note 2) HBM (Human Body Mode) ----------------------------------------------------------------------------------MM (Machine Mode) -------------------------------------------------------------------------------------------
Recommended Operating Conditions
(Note 3)
Supply Voltage, VCC ------------------------------------------------------------------------------------------- 5V 10% Ambient Temperature Range --------------------------------------------------------------------------------- 0C to 70C Junction Temperature Range --------------------------------------------------------------------------------- 0C to 125C
Electrical Characteristics
(VCC = 5V, TA = 25C, unless otherwise specified)
Parameter VCC Supply Current Nominal Supply Current Power-On Reset POR Threshold Hysteresis Trip (Low to High) VDVD Threshold Oscillator Free Running Frequency Frequency Adjustable Range Ramp Amplitude Ramp Valley Maximum On-Time of Each Channel RT Pin Voltage Reference and DAC DACOUT Voltage Accuracy DAC (VID0-VID125) Input Low DAC (VID0-VID125) Input High DAC (VID0-VID125) Bias Current VOSS Pin Voltage VDAC VILDAC VIHDAC IBIAS_DAC VVOSS RVOSS = 100k VDAC 1V VDAC < 1V -1 -10 -0.8 25 1.5 ----50 1.65 +1 +10 0.4 -75 1.8 % mV V V A V VRT RRT = 32k fOSC fOSC_ADJ VOSC VRV RRT = 32k RRT = 32k 170 50 -0.7 62 1.4 200 -1.9 1.0 66 1.60 230 400 --75 1.8 kHz kHz V V % V Hysteresis VCCRTH VCCHYS VDVDTP VDVDHYS Enable VCC Rising 4.0 0.2 1.1 -4.2 0.5 1.2 50 4.5 -1.3 -V V V mV ICC PWM 1,2,3,4 Open -12 16 mA Symbol Test Conditions Min Typ Max Units
To be continued
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RT9245
Parameter Error Amplifier DC Gain Gain-Bandwidth Product Slew Rate Current Sense GM Amplifier CSN Full Scale Source Current CSN Current for OCP Protection SS Current Over-Voltage Trip (VSEN/DACOUT) IMAX Voltage Power Good Output Low Voltage VPGOODL IPG = 4mA --0.2 V ISS OVT VIMAX RIMAX = 32k VSS = 1V 8 130 1.4 13 140 1.60 18 150 1.8 A % V IISPFSS 100 150 ----A A GBW SR COMP = 10pF ---85 10 3 ---dB MHz V/s Symbol Test Conditions Min Typ Max Units
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions.
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RT9245
Typical Operating Characteristics
GM1
300
GM2
300
VADJ
250
VADJ
250
Voltage (mV)
150 100 50 0 0 25 50 75 100
VP
Voltage (mV)
200
200 150 100 50 0
VP
VN
VN
125
150
0
25
50
75
100
125
150
Vx (mV)
Vx (mV)
GM3
300
GM4
300
VADJ
250
VADJ
250
150 100 50 0 0 25 50 75 100 125
VP
Voltage (mV)
Voltage (mV)
200
200 150 100 50 0
VP
VN
VN
150
0
25
50
75
100
125
150
Vx (mV)
Vx (mV)
Adjustable Frequency
450 400 350
Linearity of each PWM
3 2.8 2.6 2.4
FOSC (kHz)
300
V COMP (V)
250 200 150 100 50 0 0 25 50 75 100 125 150 175
2.2 2 1.8 1.6 1.4 1.2 1 0 500 1000 1500 2000 2500
PWM2 PWM3 PWM1 PWM4
fOSC = 200k
3000 3500
RRT (k) (k )
Pulse Width (ns)
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RT9245
Load Transient Response
V CORE V CORE
Load Transient Response
Phase1 Phase Phase2 IOUT VADJ
CH1: CH2: CH3: CH4: (500mV/Div) (10V/Div) (50A/Div) (100mV/Div)
Phase3
CH1: (500mV/Div), CH2: (10V/Div) CH3: (10V/Div), CH4: (10V/Div)
Time (5s/Div)
Time (5s/Div)
Relationship Between Inductor Current and VADJ
CH1:(5V/Div) CH2:(5V/Div)
Power-Off @ IOUT = 60A
PWM
PWM
CH1:(5V/Div) CH2:(20V/Div)
VSS VADJ
UGATE
CH3:(10V/Div) CH4:(1V/Div)
LGATE IL
CH3:(50mV/Div) CH4:(20A/Div)
VCOMP Time (10s/Div)
Time (25ms/Div)
Power-On @ IOUT = 60A
CH1:(5V/Div) CH2:(5V/Div)
VSS PWM
UGATE
CH3:(20V/Div) CH4:(10V/Div)
LGATE
Time (10ms/Div)
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RT9245
Application Information
RT9245 is a multi-phase DC/DC controller that precisely regulates CPU core voltage and balances the current of different power channels. The converter consisting of RT9245 and its companion MOSFET driver RT9603/ RT9603A provides high quality CPUpower and all protection functions to meet the requirement of modern VRM. Voltage Control RT9245 senses the CPU VCORE by SGND pin to sense the return of CPU to minimize the voltage drop on PCB trace at heavy load. OVP is sensed at FB pin. The internal high accuracy VID DAC provides the reference voltage for VRD10.X compliance. Control loop consists of error amplifier, multi-phase pulse width modulator, driver and power components. As conventional voltage mode PWM controller, the output voltage is locked at the VREF of error amplifier and the error signal is used as the control signal of pulse width modulator. The PWM signals of different channels are generated by comparison of EA output and split-phase sawtooth wave. Power stage transforms VIN to output by PWM signal on-time ratio. Current Balance RT9245 senses the inductor current via inductor's DCR for channel current balance and droop tuning. The differential sensing GM amplifier converts the voltage on the sense component (can be a sense resistor or the DCR of the inductor) to current signal into internal balance circuit. The current balance circuit sums and averages the current signals and then produces the balancing signals injected to pulse width modulator. If the current of some power channel is larger than average, the balancing signal reduces that channels pulse width to keep current balance. The use of single GM amplifier via time sharing technique to sense all inductor currents can reduce the offset errors and linearity variation between GMs. Thus it can greatly improve signal processing especially when dealing with such small signal as voltage drop across DCR. Load Droop The sensed power channel current signals regulate the reference of DAC to form an output voltage droop proportional to the load current. The droop or so call "active voltage positioning" can reduce the output voltage ripple at load transient and the LC filter size. Fault Detection The chip detects FB for over voltage and power good detection. The "hiccup mode" operation of over current protection is adopted to reduce the short circuit current. The in-rush current at the start up is suppressed by the soft start circuit through clamping the pulse width and output voltage. Phase Setting and Converter Start Up RT9245 interfaces with companion MOSFET drivers (like RT9603, RT9602 series) for correct converter initialization. The tri-state PWM output (high, low and high impedance) senses its interface voltage when IC POR acts (both VCC and DVD trip). The channel is enabled if the pin voltage is 1.2V less than VCC. Tie the PWM to VCC and the corresponding current sense pins to GND or left float if the channel is unused. For example, for 3-Channel application, connect PWM4 high. Current Sensing Setting RT9245 senses the current flowing through inductor via its DCR for channel current balance and droop tuning. The differential sensing GM amplifier converts the voltage on the sense component (can be a sense resistor or the DCR of the inductor) to current signal into internal circuit (see Figure 1).
L VC = R x C VC = DCR x IL I X = DCR R CSN
L DCR
R
+ -
C
GMx Ix
RCSN
Figure 1. Current Sense Circuit
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RT9245
Figure 2 is the test circuit for GM. We apply test signal at GM inputs and observe its signal process output at ADJ pin. Figure 3 shows the variation of signal processing of all channels. We observe zero offsets and good linearity between phases.
L DCR
Time Sharing of GM
CH1:(2V/Div) CH2:(50mV/Div) CH3:(50mV/Div)
PWM3
VCSP4
VCSP + VCSN GMx Ix
ESR
VX
VCSP4 and V CSN
V CSN
RCSN 1k
Time (1s/Div)
Figure 4 Over Current Protection RT9245 uses an external resistor R IMAX to set a programmable over current trip point. OCP comparator compares each inductor current with this reference current. RT9245 uses hiccup mode to eliminate fault detection of OCP or reduce output current when output is shorted to ground. 1 VIMAX 1 IL x DCR x x 2 RIMAX 3 R COMMON
OCP Comparator
Figure 2. The Test Circuit of GM
GM
300 250 200
VADJ (mV)
150 100 50 0 0 25 50 75 100 125 150
+ -
1/3 IX
1/2 IIMAX
Figure 5. Over Current Comparator
Vx (mV)
Over Current Protection
Figure 3. The Linearity of GMx Figure 4 shows the time sharing technique of GM amplifier. We apply test signal at phase 4 and observe the waveforms at both pins of GM amplifier. The waveforms show time sharing mechanism and the perfomance of GM to hold both input pins equal when the shared time is on.
CH1:(5V/Div) CH2:(5V/Div)
PWM
VSS
Time (25ms/Div)
Figure 6. The Over Current Protection in the soft start interval
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RT9245
Over Current Protection
CH1:(5V/Div) CH2:(5V/Div)
Thus if
L = (R1//R2) x C DCR
Then VC =
R2 x DCR x IL R1+ R2
PWM
VSS
With internal current balance function, this phase would share (R 1+R 2)/R 2 times current than other phases. Figure 9 &10 show different settings for the power stages. Figure 11 shows the performance of current ratio compared with conventional current balance function in Figure 12.
Time (25ms/Div)
Figure 7. Over Current Protection at steady state Current Ratio Setting
Figure 9. GM4 Setting for current ratio function
Figure 8. Application circuit for current ratio setting Figure 10. GM1~3 Setting for current ratio function For some case with preferable current ratio instead of current balance, the corresponding technique is provided. Due to different physical environment of each channel, it is necessary to slightly adjust current loading between channels. Figure 8 shows the application circuit of GM for current ratio requirement. Applying KVL along L+DCR branch and R1+C//R2 branch :
dV dI V L L + DCR x IL = R1( C + C C ) + VC dt R2 dt dVC R1 + R 2 VC = R1C + dt R2 R2 For VC = DCR x IL R1 + R 2
I L (A)
Current Ratio Function
35 30 25 20 15 10 5 0 0 15 30 45 60 75 90
IL4
IL3 IL2 IL1
Look for its corresponding conditions :
dIL dI + DCR x IL = (R1//R2)x C x DCR x L + DCR x IL dt dt L Let = (R1//R2)x C DCR L
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I OUT (A)
Figure 11
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RT9245
Current Balance Function
30
IL3
25 20
Assume the negative inductor valley current is -5A at no load, then for RCSN1 = 330, RADJ = 160, VOUT = 1.300
IL1
IL4
1.3V RCSN2
-5A x 1m 330
I L (A)
15 10 5 0 0 20 40 60
IL2
RCSN2 85.8k Choose RCSN2 = 82k
Load Line without dead zone at light loads
80 100
1.31 1.3 1.29
I OUT (A)
Figure 12
L
V CORE (V)
1.28 1.27 1.26 1.25
DCR
RCSN2 open
ESR V + CSP VCSN GMx Ix
RCSN2 = 82k
C
1.24 1.23 0 5 10 15 20 25
RCSN1
I OUT (A)
RCSN2
Figure 14 VID on the Fly With external pull up resistors tied to VID pins, RT9245 converters different VID codes from CPU into output voltage. Figure 12 and Figure 13 show the waveforms of VID on the fly function.
Figure13. Application circuit of GM For load line design, with application circuit in Figure 13, it can eliminate the dead zone of load line at light loads. VCSP = VOUT +IL x DCR if GM holds input voltages equal, then VCSP = VCSN V I x DCR IX = CSN + L RCSN2 RCSN1 = = VOUT + IL x DCR RCSN2 VOUT RCSN2 + R CSN2 + IL x DCR RCSN1 + IL x DCR RCSN1
VID on the Fly (Falling)
PWM V CORE VFB
CH3:(500mV/Div) CH4:(1V/Div)
IL x DCR
CH1:(5V/Div) CH2:(500mV/Div)
For the lack of sinking capability of GM, RCSN2 should be small enough to compensate the negative inductor valley current especially at light loads.
VID125
VDAC = 1.500, IOUT = 5A
VCSN I x DCR L RCSN2 RCSN1
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Time (25s/Div)
Figure 15
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RT9245
VID on the Fly (Rising)
Voltage Offset Function
1.284 1.282
PWM V CORE VFB
CH3:(500mV/Div) CH4:(1V/Div) CH1:(5V/Div) CH2:(500mV/Div)
1.28
V CORE (V)
1.278 1.276 1.274 1.272
VID125
VDAC = 1.500, IOUT = 5A
1.27 1.268 50 60 70 80 90 100 110
Time (25s/Div)
ROSS (k) (k )
Figure 16
Figure 18
1/4 IVOSS RB1 EA + VDAC-VADJ
PGOOD Waveform
CH1:(500mV/Div) CH2:(5V/Div) CH3:(5V/Div)
Figure 17 Output Voltage Offset Function To meet Intel's requirement of initial offset of load line, RT9245 provides programmable initial offset function. With an external resistor RVOSS and voltage source at VOSS pin to set offset current IVOSS. One quart of IVOSS flows through RB1. Error amplifier would hold the inverting pin equal to VDAC-V ADJ. Thus output voltage is subtracted from VDAL - VADJ for a constant offset voltage. PGOOD Function To indicate the condition of multiphase converter, RT9245 provides PGOOD signal through an open drain connection. The waveforms of PGOOD function are shown in Figure 15.
V CORE PGOOD
VSS
Time (10ms/Div)
Figure 19
VDD RPGOOD VPGOOD
Figure 20. PGOOD Test Circuit
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RT9245
Error Amplifier Characteristic For fast response of converter to meet stringent output current transient response, RT9245 provides large slew rate capability and high gain-bandwidth performance.
VFB
EA Rising Slew Rate
EA Falling Slew Rate
VFB
VCOMP
CH1:(500mV/Div) CH2:(2V/Div)
Time (250ns/Div)
VCOMP
CH1:(500mV/Div) CH2:(2V/Div)
Figure 22. EA Falling Transient with 10pF Loading; Slew Rate=8V/us
4.7k
Time (250ns/Div)
B 4.7k
Figure 21. EA Rising Transient with 10pF Loading; Slew Rate=10V/us
EA +
A
VREF
Figure 23. Gain-Bandwidth Measurement by signal A divided by signal B
0dB
180
Figure 24. EA Frequency Response with closed loop gain set at 0db to observe gain-bandwidth product; -3dB at 10.86MHz
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RT9245
Design Procedure Suggestion a.Output filter pole and zero (Inductor, output capacitor value & ESR). b.Error amplifier compensation & sawtooth wave amplitude (compensation network). c.Kelvin sense for VCORE. Current Loop Setting a.GM amplifier S/H current (current sense component DCR, CSN pin external resistor value). b.Over-current protection trip point (RIMAX resistor). VRM Load Line Setting a.Droop amplitude (ADJ pin resistor). b.No load offset (RCSN2) c.DAC offset voltage setting (VOSS pin & compen- sation network resistor RB1). Power Sequence & SS DVD pin external resistor and SS pin capacitor. PCB Layout a.Kelvin sense for current sense GM amplifier input. b.Refer to layout guide for other items. Voltage Loop Setting Design Example Given: Apply for four phase converter VIN = 12V VCORE = 1.5V ILOAD (MAX) = 100A VDROOP = 100mV at full load (1m Load Line) OCP trip point set at 40A for each channel (S/H) DCR = 1m of inductor at 25C L = 1.5H COUT = 8000F with 5m equivalent ESR. Let RIMAX = 14k 4. Soft-Start Capacitor Selection For most application cases, 0.1F is a good engineering value. The bode plot of EA compensation is shown as Figure 26. The bode plot of power stage is shown as Figure 27. The total loop gain is in Figure 28. 3. Over-Current Protection Setting Consider the temperature coefficient of copper 3900ppm/C,
RB1 4.7k
1. Compensation Setting a. Modulator Gain, Pole and Zero: From the following formula: Modulator Gain =VIN/VRAMP =12/2.4=5 (i.e 14dB) where VRAMP : ramp amplitude of saw-tooth wave LC Filter Pole = = 1.45kHz and ESR Zero =3.98kHz b. EA Compensation Network: Select R1 = 4.7k, R2 = 15k, C1 = 12nF, C2 = 68pF and use the Type 2 compensation scheme shown in Figure 25. By calculation, the FZ = 0.88kHz, FP = 322kHz and Middle Band Gain is 3.19 (i.e 10.07dB).
C2 68pF RB2 C1
15k 12nF EA +
Figure 25. Type 2 compensation network of EA
1 VIMAX x 2 RIMAX 1 1.690V x 2 RIMAX

1 IL x DCR x 3 R COMMON 1 40A x 1.39m x 3 330
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0dB
-180
Figure 26. The Frequency Response of the Compensator Network
0dB
-180
Figure 27. The Frequency Response of Power Stage
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RT9245
0dB
-180
Figure 28. The Loop Gain of Converter
Layout Guide
Place the high-power switching components first, and separate them from sensitive nodes. 1. Most critical path: the current sense circuit is the most sensitive part of the converter. The current sense resistors tied to CSP1,2,3,4 and CSN should be located not more than 0.5 inch from the IC and away from the noise switching nodes. The PCB trace of sense nodes should be parallel and as short as possible. Kelvin connection of the sense component (additional sense resistor or Inductor DCR) ensures the accurate stable current sensing.
Keep well Kelvin sense to ensure the stable operation!
2. Switching ripple current path: a. Input capacitor to high side MOSFET. b. Low side MOSFET to output capacitor. c. The return path of input and output capacitor. d. Separate the power and signal GND. e. The switching nodes (the connection node of high/low side MOSFET and inductor) is the most noisy points. Keep them away from sensitive small-signal node. f. Reduce parasitic R, L by minimum length, enough copper thickness and avoiding of via. 3. MOSFET driver should be closed to MOSFET. 4. The compensation, bypass and other function setting components should be near the IC and away from the noisy power path.
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RT9245
SW1 L1
VIN RIN
VOUT
COUT CIN
RL
V
L2 SW2
Figure 29. Power Stage Ripple Current Path
+12V 0.1uF VCC PVCC IN BST DRVH SW
Next to IC
+12V or +5V
PWM RT VOSS SGND
VCC CBP
+5VIN
CBOOT LO1 CIN
Kelvin Sense
Next to IC COMP CC
VCORE
COUT RCSN
RT9603
DRVL GND
RT9245
CSN FB
RC Locate next to FB Pin RFB
Locate near MOSFETs
CSPx ADJ GND
For Thermal Couple
Figure 30. Layout Consideration
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Figure 31. Layout of power stage
Test Conditions : VIN : 12V VOUT : 1.300V FSW : 200kHz IOUT : 80A Phase Number : 4 Phases U-MOSFET : IR3707 x 1 (9.5m x 9.6nC) L-MOSFET : IR8113 x 2 (6.0m x 22nC) L : 1.5uH DCR : 1m CIN : 1000uF x 8 COUT : 1000uF x 8 Snubber : 2R2+3.3nF Air Speed : Using MAGIC MGA8012HS FAN with 5VDC drive.
P1 Driver 55C P3 Driver 55C
P1 M1 58C P3 M7 64C
P1 M2 58C P3 M8 64C
P1 M3 56C P3 M9 65C
P2 Driver 56C P4 Driver 59C
P2 M4 60C P4 M10 69C
P2 M5 60C P4 M11 66C
P2 M6 60C P4 M12 61C
Note: VIN= 10.835V; IIN = 10.6A; VOUT = 1.2127V; IOUT = 80A; =84.47%
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Outline Dimension
D L
E
E1
e
A A1 b
A2
Symbol A A1 A2 b D e E E1 L
Dimensions In Millimeters Min 0.850 0.050 0.800 0.178 9.601 0.650 6.300 4.293 0.450 6.500 4.496 0.762 Max 1.200 0.152 1.050 0.305 9.804
Dimensions In Inches Min 0.033 0.002 0.031 0.007 0.378 0.026 0.248 0.169 0.018 0.256 0.177 0.030 Max 0.047 0.006 0.041 0.012 0.386
28-Lead TSSOP Plastic Package
Richtek Technology Corporation
Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com
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DS9245-06 March 2007

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